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  original speci? cations created by sharp. 1 white electronic designs - display systems division ? (503) 690-2460 ? www.wedc.com ENH064V1-800 february, 2004 rev. 0 white electronic designs display systems division ENH064V1-800 color tft-lcd module features general description wedc provides optically enhanced solutions to the standard sharp lq64d343 color active matrix lcd module. the ENH064V1-800 enhancement is an index matching (im) ? lm lamination to the front surface of the display polarizer. the im ? lm is available in two surface treatments - im/clear and im/110 (a 10% diffusion). the second enhancement is the incorporation of an enhanced light guide (elg) providing for up to 30% increase in brightness. this module is composed of a color tft-lcd panel, driver ics, control circuit and power supply circuit and a backlight unit. graphics and texts can be displayed on a 640 x rgb x 480 dot panel with 262,144 colors by supplying 18-bit data signal (6-bit/color), four timing signals, +5v dc supply voltage for tft-lcd panel driving and supply voltage for backlight. the tft-lcd panel used for this module is a low-re? ection and higher-color-saturation type. therefore, this module is also suitable for multimedia use. viewing angle is 6 oclock direction. this module offers a wide viewing angle and high brightness (800cd/m 2 ). backlight-driving dc/ac inverter is not built in this module. wedc assumes no responsibility for any damage resulting from the use of the device which does not comply with the instructions and the precautions speci? ed in these speci? cation sheets. wedc does assume the responsibility for the warranty of the enhanced product. mechanical specifications parameter speci? cations unit display size 16 (6.4") diagonal cm active area 130.6(h) x 97.0(v) mm pixel format 640(h) x 480(v) (1 pixel=r+g+b dots) pixel pixel pitch 0.204(h) x 0.202(v) mm pixel con? guration rgb vertical stripe C display mode normally white C unit outline dimensions (1) 175.0(w) x 126.5(h) x 16.0(d) mm mass 290 20 g surface treatment im/clear (glossy) or im/110 and hardcoat 3h C note: 1. excluding backlight cables.
original speci? cations created by sharp. 2 white electronic designs - display systems division ? (503) 690-2460 ? www.wedc.com ENH064V1-800 february, 2004 rev. 0 white electronic designs display systems division pin no. symbol function remark 1 gnd C C 2 ck clock signal for sampling each data signal C 3 hsync horizontal synchronous signal (1) 4 vsync vertical synchronous signal (1) 5 gnd C C 6 r0 red data signal (lsb) C 7 r1 red data signal C 8 r2 red data signal C 9 r3 red data signal C 10 r4 red data signal C 11 r5 red data signal (msb) C 12 gnd C C 13 g0 green data signal (lsb) C 14 g1 green data signal C 15 g2 green data signal C 16 g3 green data signal C 17 g4 green data signal C 18 g5 green data signal (msb) C 19 gnd C C 20 b0 blue data signal (lsb) C 21 b1 blue data signal C 22 b2 blue data signal C 23 b3 blue data signal C 24 b4 blue data signal C 25 b5 blue data signal (msb) C 26 gnd C C 27 enab signal to settle the horizontal display position (2) 28 vcc +5.0v power supply C 29 vcc +5.0v power supply C 30 r/l horizontal display mode select signal (3) 31 u/d vertical display mode select signal (4) the shielding case is not connected with gnd. mode 480 lines 400 lines 350 lines hsync negative negative positive vsync negative positive negative notes: 1) 480 line, 400 line or 350 line mode is selected by the polarity combination of both synchronous signals. 2) the horizontal display start timing is settled in accordance with a rising timing of enab signal. in case enab is ? xed low, the horizontal start timing is determined as described in horizontal display position, p. 6. do not keep enab high during operation. input terminals tft-lcd panel driving 1 2 31 30 cn1 pin arrangement from module surface (transparent view) cn1 used connector: df9ba-31p-1v (hirose electric co., ltd.) corresponding connector: df9-31s-1v (hirose electric co., ltd.) df9a-31s-1v (hirose electric co., ltd.) df9b-31s-1v (hirose electric co., ltd.) df9m-31s-1v (hirose electric co., ltd.)
original speci? cations created by sharp. 3 white electronic designs - display systems division ? (503) 690-2460 ? www.wedc.com ENH064V1-800 february, 2004 rev. 0 white electronic designs display systems division backlight driving cna, cnb used connector: bhr-03vs-1(jst) corresponding connector: sm02(8.0)b-bhs(jst) pin no. symbol function 1v high power supply for lamp (high voltage side) 2 nc this is electrically opened 3v low power supply for lamp (low voltage side) absolute maximum ratings parameter symbol condition ratings unit remark input voltage v i ta=25c -0.3~ v cc + 0.3 v (1) +5v supply voltage v cc ta=25c 0 ~ + 6 v C storage temperature tstg C -25 ~ + 70 c (2) operating temperature (ambient) topa C 0 ~ + 55 c notes: 1. ck, r0~r5, g0~g5, b0~b5, hsync, vsync, enab, r/l, u/d 2. humidity : 95%rh max. at ta < 40c. maximum wet-bulb temperature at 39c or less at ta>40c. no condensation. wedc wedc wedc wedc display reverse display reverse r/l=open, u/d=open r/l=low, u/d=open r/l=open, u/d=open r/l=open, u/d=low 3) 4)
original speci? cations created by sharp. 4 white electronic designs - display systems division ? (503) 690-2460 ? www.wedc.com ENH064V1-800 february, 2004 rev. 0 white electronic designs display systems division vcc 4.5v 2.7v 4.5v data t1 t2 t3 notes: 1) vcc-turn-on conditions t1 10ms 0 < t2 10ms 0< t3 1s vcc-dip conditions 1) 2.7v v cc < 4.5v td 10ms 2) v cc < 2.7v vcc-dip conditions should also follow the vcc-turn-on conditions notes: 2) typical current situation : 16-gray-bar pattern 480 line mode v cc = +50v 3) ck, r0~r5, g0~g5, b0~b5, hsync, vsync, enab, r/l, u/d 4) ck, r0~r5, g0~g5, b0~b5, hsync, vsync, enab 5) r/l 6) ck, r0~r5, g0~g5, b0~b5, hsync, vsync 7) enab, u/d td vcc 2.7v 4.5v rgb rgb rgb rgb rgb g 3 o g 3 4 g 3 8 g 3 5 0 g 3 1 0 ... electrical characteristics tft-lcd panel driving parameter symbol min. typ. max. unit remark +5v supply voltage v cc +4.5 +5.0 +5.5 v (1) current dissipation i cc C 250 360 ma (2) permissive input ripple voltage v rf C C 100 mvp-p v cc =+5v input voltage (low) v il C C 0.3v cc v (3) input voltage (high) v ih 0.7v cc CC v input current (low) i ol1 C C 1.0 a v i =0v (4) i ol2 C C 60.0 a v i =0v (5) input current (high) i oh1 C C 1.0 a v i =v cc (6) i oh2 C C 60.0 a v i =v cc (7)
original speci? cations created by sharp. 5 white electronic designs - display systems division ? (503) 690-2460 ? www.wedc.com ENH064V1-800 february, 2004 rev. 0 white electronic designs display systems division backlight driving the backlight system is an edge-lighting type with four ccfts (cold cathode fluorescent tube). the characteristics of a single lamp are shown in the following table. parameter symbol min. typ. max. unit remark lamp current i l 2.0 6.0 6.5 marms (1) lamp power consumption p l C 2.16 C w (2) lamp frequency f l 20 35 60 khz (3) kick-off voltage v s C C 800 vrms ta=25c C C 1000 vrms ta=0c (4) lamp life time l l C 25000 C hour (5) notes: 1) lamp current is measured with current meter for high frequency as shown below. 2) at the condition of y l= (300) cd/m 2 3) lamp frequency may produce interference with horizontal synchronous frequency, and this may cause horizontal beat on the display. therefore, lamp frequency shall be detached as much as possible from the horizontal synchronous frequency and from the harmonics of horizontal synchronous to avoid interference. 4) the open output voltage of the inverter shall be maintained for more than 1 sec; otherwise the lamp may not be turned on. 5) since lamp is consumable, the life time written above is referential value and is not guaranteed in this speci? cation sheet by wedc. lamp life time is de? ned that it applied either (1) or (2) under this condition (continuous turning on at ta=25c, il=6marms) 1) brightness becomes 50% of the original value under standard condition. 2) kickoff voltage at ta=0c exceeds maximum value, 1000 vrms. if operating under lower temp environment, the lamp exhaustion is accelerated and the brightness becomes lower. (continuous operating for around 1 month under lower temp condition may reduce the brightness to half of the original brightness.) in case of such usage under lower temp environment, periodic lamp exchange by wedc is recommended. note: 1) the performance of the backlight, for example life time or brightness, is in? uenced by the characteristics of the dc /ac inverter for the lamp. when designing or ordering the inverter, make certain that poor lighting caused by the mismatch of the backlight and the inverter (mis-lighting, ? icker, etc.) do not occur. once this is con? rmed, the module should be operated in the same condition as it is installed in the instrument. inverter module 3 pin is v low 1 3 a ~ ta=25c
original speci? cations created by sharp. 6 white electronic designs - display systems division ? (503) 690-2460 ? www.wedc.com ENH064V1-800 february, 2004 rev. 0 white electronic designs display systems division timing characteristics of input signals timing diagrams of input signal are shown in fig. 2-1~3. timing characteristics parameter symbol mode min. typ. max. unit clock frequency 1/tc all C 25.18 28.33 mhz high time tch 5 C C ns low time tcl 10 C C ns data setup time tds 5 C C ns hold time tdh 10 C C ns horizontal sync. signal cycle th 30.00 31.78 C s 770 800 900 clock pulse width thp 2 96 200 clock vertical sync. signal cycle tv 480 515 525 560 line 400 446 449 480 line 350 447 449 510 line pulse width tvp all 2 C 34 line horizontal display period thd 640 640 640 clock hsync-clock phase difference thc 10 C t c -10 ns hsync-vsync phase difference tvh 0 C th-thp clock note: 1) in case of lower frequency, the deterioration of display quality, ? icker, etc., may occur. horizontal display position the horizontal display position is determined by enab signal and the input data corresponding to the rising edge of enab signal is displayed at the left end of the active area. parameter symbol min. typ. max. unit enable signal setup time tes 5 C tc-10 ns pulse width tep 2 640 640 clock hsync-enable signal phase difference the 44 C th-664 clock note: 1) when enab is ? xed low, the display starts from the data of c104 (clock) as shown in fig. 2-1~3. be careful the module does not work when enab is ? xed high.
original speci? cations created by sharp. 7 white electronic designs - display systems division ? (503) 690-2460 ? www.wedc.com ENH064V1-800 february, 2004 rev. 0 white electronic designs display systems division vertical display position the vertical display position is automatically centered in the active area at each mode of vga, 480-, 400-, and 350-line mode. each mode is selected depending on the polarity of the synchronous signals described in note 1 on page 2. in each mode, the data of tvn is displayed on the top line of the active area. the display position will be centered mode v-data start (tvs) v-data period (tvd) v-display start (tvn) v-display period unit 480 34 480 34 480 line 400 34 400 443-tv 480 line 350 61 350 445-tv 480 line input data signals and display position on the screen on the screen like the following ? gure when the period of vertical synchronous signal, tv, is typical value. in 400-, and 350-line mode, the data in the vertical data invalid period is also displayed. so inputting all data () is recommended during vertical data invalid period. enab signal has no relation to the vertical display position. d1, dh1 d1, dh2 d1, dh3 d2, dh1 d2, dh2 d3, dh1 d1, dh480 d640, dh1 d640, dh480 rgb up r/l = open u/d = open data invalid period data invalid period data invalid period data invalid period data period data period 4 0 lines 4 0 lines 4 0 0 lines 6 5 lines 6 5 lines 3 5 0 lines 400 lines mode (tv=449) 350 lines mode (tv=449) display postion of input data (480 lines mode)
original speci? cations created by sharp. 8 white electronic designs - display systems division ? (503) 690-2460 ? www.wedc.com ENH064V1-800 february, 2004 rev. 0 white electronic designs display systems division thp thc 0.3vcc 0.3vcc 0.3vcc 0.3vcc 0.3vcc 0.3vcc 0.3vcc 0.3vcc 0.7vcc 0.7vcc 0.7vcc c1* c2* c104* tc tc tch tdh tds number of clock *only when enable terminal is fixed "low" number of h-data horizontal invalid data period d640 d639 d3 d2 d1 horizontal invalid data period th 0.3vcc the 0.7vcc 0.7vcc 0.3vcc tes tep thd 0.3vcc 0.3vcc tv 0.7vcc tvp tvs tvh 12 vertical invalid data period 34 number of line dh1 dh2 dh3 tvd dh479 dh480 vertical invalid data period number of v-data line fig 2-1 input signal waveforms (480 line mode) data signal (r0~r5, g0~g5 b0~b5) data signal (r0~r5, g0~g5 b0~b5) horizontal sync. signal (hsync) horizontal sync. signal (hsync) vertical sync. signal (vsync) data enable signal (enab) clock signal (ck)
original speci? cations created by sharp. 9 white electronic designs - display systems division ? (503) 690-2460 ? www.wedc.com ENH064V1-800 february, 2004 rev. 0 white electronic designs display systems division thp thc 0.3vcc 0.3vcc 0.3vcc 0.3vcc 0.3vcc 0.3vcc 0.3vcc 0.7vcc 0.7vcc 0.7vcc c1* c2* c104* tc tc tch tdh tds number of clock *only when enable terminal (enab) is fixed "low" number of h-data horizontal invalid data period d640 d639 d3 d2 d1 horizontal invalid data period th 0.3vcc the 0.7vcc 0.7vcc 0.7vcc tes tep thd 0.3vcc 0.7vcc tv 0.3vcc tvp tvs tvh 12 vertical invalid data period 34 number of line dh1 dh2 dh3 tvd dh399 dh400 vertical invalid data period number of v-data line fig. 2-2 input signal waveforms (400 line mode) data signal (r0~r5, g0~g5, b0~b5) data signal (r0~r5, g0~g5, b0~b5) horizontal sync. signal (hsync) horizontal sync. signal (hsync) vertical sync. signal (vsync) data enable signal (enab) clock signal (ck)
original speci? cations created by sharp. 10 white electronic designs - display systems division ? (503) 690-2460 ? www.wedc.com ENH064V1-800 february, 2004 rev. 0 white electronic designs display systems division thp thc 0.7vcc 0.7vcc 0.3vcc 0.3vcc 0.3vcc 0.3vcc 0.3vcc 0.7vcc 0.7vcc 0.3vcc c1* c2* c104* tc tc tch tdh tds number of clock *only when enable terminal (enab) fixed "low" number of h-data horizontal invalid data period d640 d639 d3 d2 d1 horizontal invalid data period th 0.7vcc the 0.7vcc 0.3vcc 0.3vcc tes tep thd 0.3vcc 0.3vcc tv 0.7vcc tvp tvs tvh 1 2 vertical invalid data period 61 number of line dh1 dh2 dh3 tvd dh349 dh350 vertical invalid data period number of v-data line fig 2-3 input signal waveforms (350 line mode) data signal (r0~r5, g0~g5, b0~b5) data signal (r0~r5, g0~g5, b0~b5) horizontal sync. signal (hsync) horizontal sync. signal (hsync) vertical sync. signal (vsync) data enable signal (enab) clock signal (ck)
original speci? cations created by sharp. 11 white electronic designs - display systems division ? (503) 690-2460 ? www.wedc.com ENH064V1-800 february, 2004 rev. 0 white electronic designs display systems division input signals, basic display color and gray scale of each color colors & gray scale data signal gray scale r0 r1 r2 r3 r4 r5 g0 g1 g2 g3 g4 g5 b0 b1 b2 b3 b4 b5 basic color black C 000000000000000000 blue C 000000000000111111 green C 000000111111000000 cyan C 000000111111111111 red C 111111000000000000 magenta C 111111000000111111 yellow C 111111111111000000 white C 111111111111111111 gray scale or red black gs0 000000000000000000 darker brighter gs1 110000000000000000 gs2 010000000000000000 gs61001111000000000000 gs62001111100000000000 red gs63011111000000000000 gray scale of green black gs0 000000000000000000 darker brighter gs1 000000100000000000 gs2 000000010000000000 gs61000000101111000000 gs6 000000011111000000 green gs63000000111111000000 gray scale of blue black gs0 000000000000000000 darker brighter gs1 000000000000100000 gs2 000000000000010000 gs61000000000000101111 gs62000000000000011111 blue gs63000000000000111111 notes: 1) 0: low level voltage 1: high level voltage 2) each basic color can be displayed in 64 gray scales from 6 bit data signals. according to the combination of total 18 bit data signals, the 262,144-color display can be achieved on the screen.
original speci? cations created by sharp. 12 white electronic designs - display systems division ? (503) 690-2460 ? www.wedc.com ENH064V1-800 february, 2004 rev. 0 white electronic designs display systems division optical characteristics ta=25c, v cc =+5v parameter symbol condition min. typ. max. unit remark viewing angle range horizontal 21 (cr5) 60 70 C deg. (4) 22 60 70 C deg. vertical 11 35 40 C deg. 12 55 70 C deg. contrast ratio cr best viewing angle 100 C C C (2,4) response time rise tr = 0 C20 Cms (3,4) decay td C 40 C ms chromaticity of white x C 0.313 C C (4) y C 0.325 C C luminance of white y l 700 800 C cd/m 2 white uniformity w C C 1.45 C (5) viewing angle range as a brightness de? nition horizontal 21 50% of the maximum brightness C 45 C deg. (1) 22 C 45 C deg. vertical 11 C 45 C deg. 12 C 45 C deg. note: 1) the measurement shall be executed 30 minutes after lighting at rating. (typical condition: i l =6marms) the optical characteristics shall be measured in a dark room or equivalent state with the method shown in fig. 3 below. fig. 3 optical characteristics measurement method lcd panel tft-lcd module 400mm field=2 photodetector (bm-5a: topcon) center of the screen
original speci? cations created by sharp. 13 white electronic designs - display systems division ? (503) 690-2460 ? www.wedc.com ENH064V1-800 february, 2004 rev. 0 white electronic designs display systems division notes: 1) de? nitions of viewing angle range: 2) de? nition of contrast ratio: the contract ratio is de? ned as the following. 3) de? nition of response time: the response time is de? ned as the following ? gure and shall be measured by switching the input signal for black and white. 4) this shall be measured at center of the screen. 5) de? nition of white uniformity: white uniformity is de? ned as the following with ? ve measurements. (a~e). a b c d e 160 320 480 120 240 360 pixel pixel normal line 6 o'clock direction 12 22 11 21 maximum luminance of ? ve points (brightness) minimum luminance of ? ve points (brightness) w= 100% 90% 10% 0% white white black time r d photodetector output (relative value) luminance (brightness) with all pixels white luminance (brightness) with all pixels black contrast ratio (cr) =
original speci? cations created by sharp. 14 white electronic designs - display systems division ? (503) 690-2460 ? www.wedc.com ENH064V1-800 february, 2004 rev. 0 white electronic designs display systems division reliability test items no. test item conditions 1 high temperature storage test ta=70c 240h 2 low temperature storage test ta=25c 240h 3 high temperature & high humidity operation test ta=40c, 95%rh (no condensation) 240h 4 high temperature operation test ta=55c 240h 5 low temperature operation test ta=0c 240h 6 vibration test (non-operating) frequency sweep time test period :10~57hz/vibration width (one side):0.075mm :58~500hz/gravity: 9.8m/s2 :11 minutes :3 hours (1 hour for each direction of x,y,z) 7 shock test (non-operating) max. gravity pulse width direction :490m/s 2 :11ms, half sine wave :x, y, z (once for each direction.) display quality the display quality of the color tft-lcd module shall be in compliance with the incoming inspection standard. handling precautions 1) be sure to turn off the power supply when inserting or disconnecting the cable. 2) design the cabinet so that the module can be installed without any extra stress such as warp or twist. 3) since the front polarizer is easily damaged, pay attention to avoid rubbing with something hard or sharp. 4) wipe water off immediately. long contact with water may cause discoloration or spots. 5) when the panel surface is soiled, use an absorbent cotton or other soft cloth to wipe it off. 6) since the panel is made of glass, re? ned wires and components, it may break, crack or cause internal wire breaking if dropped or bumped on hard surface. handle with care. 7) since cmos lsi is used in this module, make certain one is grounded when handling. 8) observe all other precautionary requirements in handling components. 9) this module has its circuitry pcbs on the rear side and should be carefully handled in order to avoid being stressed. 10) laminated ? lm is attached to the module surface to prevent it from being scratched. before use, peel the ? lm off slowly, with strict attention to electrostatic charges. ionized air shall be blown over during the action. blow off dust on the polarizer by using an ionized nitrogen gun. 11) connect gnd to 4 place of mounting holes to stabilize against emi and external noise. 12) the high voltage portions on the backlight are very dangerous. careless handling may lead to electrical shock. packing form 1) piling number of cartons: max 10 2) package quantity in one carton: 20pcs 3) carton size: 355 (w) x 282 (d) x 265 (h) mm 4) total mass of 1 carton ? lled with full modules: 7.0kg others 1) disassembling the module can cause permanent damage and should be avoided. 2) image retention may occur when a ? xed pattern is displayed for a long time. exchange of lamps this must be action must be performed by wedc.
original speci? cations created by sharp. 15 white electronic designs - display systems division ? (503) 690-2460 ? www.wedc.com ENH064V1-800 february, 2004 rev. 0 white electronic designs display systems division 1) tolerance x-direction a:41208 2) tolerance x-direction b:15208 3) tolerance y-direction c:15208 4) tolerance y-direction d:15208 5) obliquity of display area ie-fi<08 notes: 1) unspeci? ed tolerance to be 0.5. 2) floating of pwb and chassis are excluded from module thickness. 3) diameter of mounting boss shall be the range of 3.5mm to 4mm. (center of oval hole) 6.358 6.417 6.801 6.890 4.980 4.892 4.459 4.399 0.581 0.521 0.089 0.000 0.000 0.089 4x ?0.083 mounting holes bezel opening 2.157 [54.79 mm] 5.362 [136.20 mm] 0.638 active area 3.819 [97.00 mm] bezel opening 3.937 [100.00 mm] 1.055 1.217 5.142 [130.60 mm] active area


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